? semiconductor components industries, llc, 2011 august, 2011 ? rev. 1 1 publication order number: NL17SH00/d NL17SH00 single 2-input nand gate the NL17SH00 is an advanced high speed cmos 2 ? input nand gate fabricated with silicon gate cmos technology. the internal circuit is composed of multiple stages, including a buffer output which provides high noise immunity and stable output. the NL17SH00 input structure provides protection when voltages up to 7.0 v are applied, regardless of the supply voltage. this allows the NL17SH00 to be used to interface 5.0 v circuits to 3.0 v circuits. features ? high speed: t pd = 3.0 ns (typ) at v cc = 5.0 v ? low power dissipation: i cc = 1 a (max) at t a = 25 c ? power down protection provided on inputs ? balanced propagation delays ? pin and function compatible with other standard logic families ? these are pb ? free devices figure 1. pinout (top view) v cc in b in a out y gnd figure 2. logic symbol out y & 1 2 34 5 in b in a pin assignment 1 2 3in b in a gnd 4 5v cc out y l l h h l h l h function table inputs output ab h h h l y see detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ordering information marking diagram sot ? 953 case 527ae http://onsemi.com a = specific device code m = month code am 1
NL17SH00 http://onsemi.com 2 maximum ratings symbol parameter value unit v cc dc supply voltage ? 0.5 to +7.0 v v in dc input voltage ? 0.5 to +7.0 v v out dc output voltage ? 0.5 to v cc +0.5 v i ik dc input diode current ? 20 ma i ok dc output diode current 20 ma i out dc output current 25 ma i cc dc supply current per supply pin 50 ma t stg storage temperature range ? 65 to +150 c t l lead temperature, 1 mm from case for 10 seconds 260 c t j junction temperature under bias +150 c p d power dissipation in still air 50 mw msl moisture sensitivity level 1 f r flammability rating oxygen index: 28 to 34 ul 94 v ? 0 @ 0.125 in i latchup latchup performance above v cc and below gnd at 125 c (note 1) 100 ma stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. tested to eia/jesd78. recommended operating conditions symbol parameter min max unit v cc dc supply voltage 2.0 5.5 v v in dc input voltage 0.0 5.5 v v out dc output voltage 0.0 v cc v t a operating temperature range ? 55 +125 c t r , t f input rise and fall time v cc = 3.3 v 0.3 v v cc = 5.0 v 0.5 v 0 0 100 20 ns/v device junction temperature versus time to 0.1% bond failures junction temperature c time, hours time, years 80 1,032,200 117.8 90 419,300 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 1 1 10 100 1000 failure rate of plastic = ceramic until intermetallics occur figure 3. failure rate vs. time junction temperature normalized failure rate time, years t j = 130 c t j = 120 c t j = 110 c t j = 100 c t j = 90 c t j = 80 c
NL17SH00 http://onsemi.com 3 dc electrical characteristics symbol parameter test conditions v cc (v) t a = 25 c t a 85 c 55 c to 125 c unit min typ max min max min max v ih minimum high ? level input voltage 2.0 3.0 4.5 5.5 1.5 2.1 3.15 3.85 1.5 2.1 3.15 3.85 1.5 2.1 3.15 3.85 v v il maximum low ? level input voltage 2.0 3.0 4.5 5.5 0.5 0.9 1.35 1.65 0.5 0.9 1.35 1.65 0.5 0.9 1.35 1.65 v v oh minimum high ? level output voltage v in = v ih or v il v in = v ih or v il i oh = ? 50 a 2.0 3.0 4.5 1.9 2.9 4.4 2.0 3.0 4.5 1.9 2.9 4.4 1.9 2.9 4.4 v v in = v ih or v il i oh = ? 4 ma i oh = ? 8 ma 3.0 4.5 2.58 3.94 2.48 3.80 2.34 3.66 v ol maximum low ? level output voltage v in = v ih or v il v in = v ih or v il i ol = 50 a 2.0 3.0 4.5 0.0 0.0 0.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 v v in = v ih or v il i ol = 4 ma i ol = 8 ma 3.0 4.5 0.36 0.36 0.44 0.44 0.52 0.52 i in maximum input leakage current v in = 5.5 v or gnd 0 to 5.5 0.1 1.0 1.0 a i cc maximum quiescent supply current v in = v cc or gnd 5.5 1.0 10 40 a ac electrical characteristics input t r = t f = 3.0 ns symbol parameter test conditions t a = 25 c t a 85 c 55 c to 125 c unit min typ max min max min max ???? ???? ???? ???? t plh , t phl ??????? ??????? ??????? ??????? ????????? ????????? 0.3 v c l = 15 pf c l = 50 pf ??? ??? ??? ??? ??? ??? ?? ?? ??? ??? ???? ???? ??? ??? ?? ?? ?? ?? ????????? ????????? ????????? 0.5 v c l = 15 pf c l = 50 pf ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ?? ??? ??? ??? ???? ???? ???? ??? ??? ??? ???? ???? ???? ??????? ??????? ??????? ????????? ????????? ????????? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ?? ??? ??? ??? ???? ???? ???? ??? ??? ??? ?? ?? ?? typical @ 25 c, v cc = 5.0 v 10 pf 2. c pd is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption with out load. average operating current can be obtained by the equation: i cc(opr ) = c pd v cc f in + i cc . c pd is used to determine the no ? load dynamic power consumption; p d = c pd v cc 2 f in + i cc v cc .
NL17SH00 http://onsemi.com 4 v cc gnd 50% 50% v cc a or b y t phl t plh figure 4. switching waveforms figure 5. test circuit *includes all probe and jig capacitance. a 1 ? mhz square input wave is recommended for propagation delay tests. c l* input v cc output ordering information device package shipping ? NL17SH00p5t5g sot ? 953 (pb ? free) 8000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
NL17SH00 http://onsemi.com 5 package dimensions sot ? 953 case 527ae issue e *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* e d c a h e 123 4 5 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters 3. maximum lead thickness includes lead finish. minimum lead thickness is the minimum thickness of the base material. 4. dimensions d and e do not include mold flash, protrusions, or gate burrs. dim min nom max millimeters a 0.34 0.37 0.40 b 0.10 0.15 0.20 c 0.07 0.12 0.17 d 0.95 1.00 1.05 e 0.75 0.80 0.85 e 0.35 bsc l 0.95 1.00 1.05 h e x y pin one indicator b 5x x 0.08 y l 5x l3 l2 e 5x 5x l2 0.05 0.10 0.15 l3 ??? ??? 0.15 0.175 ref top view side view bottom view 1.20 dimensions: millimeters 0.20 5x 1 package outline 0.35 pitch 0.35 5x on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 NL17SH00/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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